Devices are known that employ, for example, processing devices (e.g., microprocessors, CPUs, ASICs, etc.) that are coupled to reconfigurable logic such as field programmable gate arrays. Such devices may include, for example, cell phones, digital video players, digital music players, and combination thereof, or any portable or non-portable device. For example, it may be desirable to have reconfigurable logic, such as a field programmable gate array perform certain operations of the device and leave the microprocessor or other processing device to perform other processes. Typically the processor executes applications and the reconfigurable logic may perform functions that may be complimentary to or supplemental to operations carried out by the processor, for example.
Profiling of hardware and/or software is a known technique used to measure performance. Devices and methods are known that utilize hardware and/or software to perform this profiling. It also is known that, for example, one integrated circuit may be used to profile an application that is executing on another integrated circuit, such as a processor that is coupled to a field programmable gate array, as mentioned above. The integrated circuits may be on the same die if desired or the profiling may be performed by a software application executing on the processor running the application. In general, profiling is utilized to determine the performance of the application with the goal to improve this performance by some means. In the example above, the profiler is typically profiling an application that is running on the processor to see whether or not the reconfigurable logic can be reprogrammed to enhance the operation of the device. For example, such a device could perform on-chip profiling by profiling an application using the device processor, or by using dedicated on-chip profiling hardware. However, handheld devices or portable devices can also have limited on-chip resources, for example computing power, to carry out the analysis of the gathered profile information and to carry out the design of a reconfiguration for the reconfigurable logic that will improve the performance of the profiled application. In addition, employing on-chip profiling analysis and accelerator design can increase the cost of a chip since it needs to have these capabilities onboard even though they are used only infrequently. Finally, limiting the computing power can limit the range of alternatives that can be employed to reconfigure the reconfiguration logic that is coupled to the processor that is performing the on-chip profiling.
In other devices, it is known to utilize a repository of predefined field programmable gate array configurations to reconfigure field programmable gate arrays in a device. However, such remote repositories do not typically employ any configuration information that is based on application profiling information that is obtained, for example, while an application is running on a processor on the device.
It would be desirable to have a system, method or apparatus that addresses one or more of the above drawbacks.